AN EFFICIENT ARCHITECTURE FOR CORRECTING COMPONENT

专利名称：AN EFFICIENT ARCHITECTURE FOR

CORRECTING COMPONENT MISMATCHESAND CIRCUIT NONLINEARITIES IN A/DCONVERTERS

发明人：CAPOFREDDI, Peter, D.,FONG, Edison,WONG,

Bill, C.

申请号：EP95935030.0申请日：19950920公开号：EP0730794A1公开日：19960911

摘要：An error correction technique for high-resolution analog-to-digital converterscorrects for both component mismatch and circuit nonlinearity errors by utilizing look-uptables to store mismatch coefficients, which represent the errors introduced by

component mismatch, as well as a series of offset and gain coefficients, which are utilizedto form a piecewise-linear representation of the error introduced by circuit nonlinearities.The use of an independent gain and offset parameter for each segment of the piecewise-linear representation allows discontinuous functions to be accommodated. This leads toa more efficient implementation since it allows the error introduced by mismatch in thecomponents representing the most significant bits to be included in the piecewise lineartable, while separate look-up tables are used for the less significant bits.

申请人：NATIONAL SEMICONDUCTOR CORPORATION

地址：1090 Kifer Road, M/S 16-135 Sunnyvale, CA 94086-3737 US

国籍：US

代理机构：Horton, Andrew Robert Grant, et al

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