专利名称:ARITHMETIC PROCESSOR发明人:SAKURAI YOSHIO申请号:JP24081085申请日:19851028公开号:JPS62100835A公开日:19870511
摘要:PURPOSE:To simplify the constitution of a peripheral circuit of a control flip-flop group by adding newly a means to add a microinstruction according to the readingresult of the flip-flop group in case an address is designated. CONSTITUTION:Thisarithmetic processor extracts the microinstructions successively out of a microprogrammemory 3 and carries out the arithmetic processing in accordance with each
microinstruction. In this respect, the control flip-flop FF which are needed for executionof said arithmetic processing are divided into groups and the address of the program 3 ispartly allocated to each group. A microinstruction adding circuit 6 adds the controlinformation to the reading enable state. In such a constitution, it is not needed to providea large quantity of hardware like a processor bus sequence control circuit, etc. at theperiphery of the group 4.
申请人:NEC CORP
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