4050B资料

CD4049UBC • CD4050BC Hex Inverting Buffer • Hex Non-Inverting BufferOctober 1987Revised January 1999

CD4049UBC • CD4050BCHex Inverting Buffer •Hex Non-Inverting Buffer

General Description

The CD4049UBC and CD4050BC hex buffers are mono-lithic complementary MOS (CMOS) integrated circuits con-structed with N- and P-channel enhancement modetransistors. These devices feature logic level conversionusing only one supply voltage (VDD). The input signal highlevel (VIH) can exceed the VDD supply voltage when thesedevices are used for logic level conversions. Thesedevices are intended for use as hex buffers, CMOS to DTL/TTL converters, or as CMOS current drivers, and at VDD =5.0V, they can drive directly two DTL/TTL loads over thefull operating temperature range.

Features

sWide supply voltage range: 3.0V to 15V

sDirect drive to 2 TTL loads at 5.0V over full temperaturerangesHigh source and sink current capability

sSpecial input protection permits input voltages greaterthan VDD

Applications

•CMOS hex inverter/buffer•CMOS to DTL/TTL hex converter•CMOS current “sink” or “source” driver•CMOS HIGH-to-LOW logic level converter

Ordering Code:

Order NumberCD4049UBCMCD4049UBCNCD4050BCMCD4050BCN

Package Number

M16AN16EM16AN16E

Package Description

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagrams

Pin Assignments for DIP

CD4049UBC

CD4050BC

Top ViewTop View

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CD4049UBC • CD4050BCSchematic Diagrams

CD4049UBC1 of 6 Identical Units

CD4050BC

1 of 6 Identical Units

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CD4049UBC • CD4050BC Absolute Maximum Ratings(Note 1)

(Note 2)

Supply Voltage (VDD)Input Voltage (VIN)

Voltage at Any Output Pin (VOUT)Storage Temperature Range (TS)Power Dissipation (PD)Dual-In-LineSmall OutlineLead Temperature (TL)(Soldering, 10 seconds)

260°C700 mW500 mW−0.5V to +18V−0.5V to +18V−0.5V to VDD + 0.5V−65°C to +150°C

Recommended OperatingConditions (Note 2)

Supply Voltage (VDD)Input Voltage (VIN)

Voltage at Any Output Pin (VOUT)Operating Temperature Range (TA)CD4049UBC, CD4050BC

−40°C to +85°C

Note 1: “Absolute Maximum Ratings” are those values beyond which thesafety of the device cannot be guaranteed; they are not meant to imply thatthe devices should be operated at these limits. The table of “Recom-mended Operating Conditions” and “Electrical Characteristics” providesconditions for actual device operation.Note 2: VSS = 0V unless otherwise specified.

3V to 15V0V to 15V0 to VDD

DC Electrical Characteristics (Note 3)

SymbolIDD

Parameter

Quiescent Device Current

VDD = 5VVDD = 10VVDD = 15V

VOL

LOW Level Output Voltage

VIH = VDD, VIL = 0V,|IO| < 1 µAVDD = 5VVDD = 10VVDD = 15V

VOH

HIGH Level Output Voltage

VIH = VDD, VIL = 0V,|IO| < 1 µAVDD = 5VVDD = 10VVDD = 15V

VIL

LOW Level Input Voltage(CD4050BC Only)

|IO| < 1 µA

VDD = 5V, VO = 0.5VVDD = 10V, VO = 1VVDD = 15V, VO = 1.5V

VIL

LOW Level Input Voltage(CD4049UBC Only)

|IO| < 1 µA

VDD = 5V, VO = 4.5VVDD = 10V, VO = 9VVDD = 15V, VO = 13.5V

VIH

HIGH Level Input Voltage(CD4050BC Only)

|IO| < 1 µA

VDD = 5V, VO = 4.5VVDD = 10V, VO = 9VVDD = 15V, VO = 13.5V

VIH

HIGH Level Input Voltage(CD4049UBC Only)

|IO| < 1 µA

VDD = 5V, VO = 0.5VVDD = 10V, VO = 1VVDD = 15V, VO = 1.5V

IOL

LOW Level Output Current(Note 4)

VIH = VDD, VIL = 0VVDD = 5V, VO = 0.4VVDD = 10V, VO = 0.5VVDD = 15V, VO = 1.5V

IOH

HIGH Level Output Current(Note 4)

VIH = VDD, VIL = 0VVDD = 5V, VO = 4.6VVDD = 10V, VO = 9.5VVDD = 15V, VO = 13.5V

IIN

Input Current

VDD = 15V, VIN = 0VVDD = 15V, VIN = 15V

Note 3: VSS = 0V unless otherwise specified.

Conditions

−40°CMin

Max4816

Min

+25°CTyp0.030.050.07

Max4.08.016.0

+85°CMin

Max3060120

UnitsµAµAµA

0.050.050.05

000

0.050.050.05

0.050.050.05

VVV

4.959.9514.95

1.53.04.01.02.03.0

3.57.011.04.08.012.04.69.829−1.0−2.1−7.1−0.30.3

4.959.9514.95

510152.254.56.751.52.53.5

1.53.04.01.02.03.0

4.959.9514.95

1.53.04.01.02.03.0

3.57.011.04.08.012.03.26.820−0.72−1.5−5

−1.01.0

VVVVVVVVVVVVVVVmAmAmAmAmAmAµAµA

3.57.011.04.08.012.04.08.525−0.9−1.9−6.2−0.30.3

2.755.58.253.57.511.551240−1.6−3.6−12−10−510−5

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CD4049UBC • CD4050BCDC Electrical Characteristics (Continued)

Note 4: These are peak output current capabilities. Continuous output current is rated at 12 mA maximum. The output current should not be allowed toexceed this value for extended periods of time. IOL and IOH are tested one output at a time.

AC Electrical Characteristics (Note 5)

CD4049UBC

TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise specified

SymboltPHL

Parameter

Propagation Delay TimeHIGH-to-LOW Level

tPLH

Propagation Delay TimeLOW-to-HIGH Level

tTHL

Transition TimeHIGH-to-LOW Level

tTLH

Transition TimeLOW-to-HIGH Level

CIN

Input Capacitance

VDD = 5VVDD = 10VVDD = 15VVDD = 5VVDD = 10VVDD = 15VVDD = 5VVDD = 10VVDD = 15VVDD = 5VVDD = 10VVDD = 15VAny Input

Note 5: AC Parameters are guaranteed by DC correlated testing.

ConditionsMinTyp30201545252030201560302515

Max654030854535604030120554522.5

UnitsnsnsnsnsnsnsnsnsnsnsnsnspF

AC Electrical Characteristics (Note 6)

CD4050BC

TA = 25°C, CL = 50 pF, RL = 200k, tr = tf = 20 ns, unless otherwise specified

SymboltPHL

Parameter

Propagation Delay TimeHIGH-to-LOW Level

tPLH

Propagation Delay TimeLOW-to-HIGH Level

tTHL

Transition TimeHIGH-to-LOW Level

tTLH

Transition TimeLOW-to-HIGH Level

CIN

Input Capacitance

VDD = 5VVDD = 10VVDD = 15VVDD = 5VVDD = 10VVDD = 15VVDD = 5VVDD = 10VVDD = 15VVDD = 5VVDD = 10VVDD = 15VAny Input

Note 6: AC Parameters are guaranteed by DC correlated testing.

ConditionsMinTyp6025206030253020156030255

Max1105530120554560403012055457.5

UnitsnsnsnsnsnsnsnsnsnsnsnsnspF

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CD4049UBC • CD4050BC Switching Time Waveforms

Typical Applications

CMOS to TLL or CMOS at a Lower VDD

VDD1 ≥ VDD2

In the case of the CD4049UBC the output drive capability increases with increasing input voltage. E.g., If VDD1 = 10V the CD4049UBC could drive 4 TTL loads.

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CD4049UBC • CD4050BCPhysical Dimensions inches (millimeters) unless otherwise noted

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

Package Number M16A

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CD4049UBC • CD4050BC Hex Inverting Buffer • Hex Non-Inverting BufferPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Package Number N16E

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2.A critical component in any component of a life support1.Life support devices or systems are devices or systems

device or system whose failure to perform can be rea-which, (a) are intended for surgical implant into the

sonably expected to cause the failure of the life supportbody, or (b) support or sustain life, and (c) whose failure

device or system, or to affect its safety or effectiveness.to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to thewww.fairchildsemi.comuser.

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.